Download PDFOpen PDF in browserInternet of Things Introducing FPGAs in heterogeneous systemsEasyChair Preprint 166618 pages•Date: October 14, 2019AbstractThe purpose of this study is to identify a new design concept in Internet of Things. The main idea behind the study is the exploring of new patterns in which different technologies, devices and protocols can integrate with one another with the aim of defining the due processes of data acquisition, aggregation and transmission from the perspective of Field Programmable Gate Arrays (FPGAs), without inherently presenting major constraints to the designer. To serve this purpose, different topologies and infrastructures can be proposed, with the designs that utilize higher processing rates at the center of the system being deprecated in comparison with the ones that perform more processing at the edge of the network. Meanwhile, current standards implicitly require system designs to follow the ‘edge processing’ paradigm, leading to the proposal of having most of the processing being performed by FPGAs in a heterogenous context of protocols and devices. A thorough introduction of the technology that enables efficient processing in FPGAs is presented. In addition, the benefits of parallel processing, a feature that the device provides us with, are subsequently discussed. Different ways of making the paradigm work are also shown, with one possible design elaborated in detail. The implications arising throughout the design should provide a clear view on the economic and technical feasibility of the design, highlighting power proficiency as one key benefit alongside communication challenges as a potential drawback. The findings of this study will hopefully provide insights on the possible ways of increasing processing proficiency while following current industrial standards and well-known best practices. Keyphrases: Component Logic Blocks, Edge Processing, Field Programmable, Gate Arrays, Internet of Things, publisher-subscriber
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